Siemens-TSMC expand AI collaboration for next-gen chip design

Siemens and TSMC Expand Partnership for AI-Driven Chip Design

Siemens and TSMC have expanded their strategic partnership to advance AI-powered automation in Electronic Design Automation (EDA) and support cutting-edge semiconductor manufacturing nodes. The collaboration focuses on enhancing design speed, accuracy, and energy efficiency for next-generation chips.

Key Collaboration Areas

• AI-Powered Design Solutions: The partnership integrates AI across EDA workflows using Siemens’ new Fuse™ EDA AI System. Key features include automated Design Rule Check (DRC) error correction via Calibre® software and real-time design cycle acceleration via Aprisa™ software.
• Advanced 3D Chip Designs: Siemens’ tools are now certified for TSMC’s 3DFabric® technologies. This includes Calibre 3DStack for verifying 3D system connectivity/alignment and Calibre 3DThermal for static and transient thermal analysis in complex stacked chips.
• Support for Advanced Manufacturing Nodes: Siemens’ EDA tools have achieved certification for TSMC’s newest, smallest transistor technologies:
  • Calibre nmPlatform: Certified for 3nm, 2nm, A16, and A14 nodes.
  • Solido Simulation Suite: Certified for SPICE accuracy on N3A, N2P, A16, and A14 nodes to verify analog/mixed-signal circuits and check for aging/thermal effects.
  • mPower analog tool & Aprisa: Certified for TSMC’s N2P process to ensure power integrity (EM/IR sign-off) and advanced digital implementation.
• Silicon Photonics Technology: The collaboration supports TSMC-COUPE™ technology, using light instead of electricity for data transmission. Tools like Innovator3D IC™, Calibre 3DStack, L-Edit, and Solido Simulation Suite are enabled for this emerging field.

Summary: By deeply integrating AI and securing tool readiness for future nodes like A16 and A14, Siemens and TSMC aim to equip the global semiconductor industry to accelerate the development of more powerful, efficient, and reliable chips.