In 2026, glass core substrates have moved from laboratory curiosity to commercial reality. Intel has transitioned its glass substrate technology into high-volume manufacturing (HVM), while Samsung Electro-Mechanics is aggressively building a supply chain through joint ventures with Sumitomo Chemical Group. This is not a distant roadmap item — it is an active, high-stakes competition that will define who controls the future of advanced packaging.
What Is a Glass Core Substrate and How Does It Work?
A glass core substrate replaces the traditional organic resin core — typically made of ABF (Ajinomoto Build-up Film) laminate — with a precision-engineered glass panel. The glass core serves as the structural backbone of the package substrate, upon which redistribution layers (RDLs) and through-glass vias (TGVs) are fabricated.
Key Structural Advantages Over Organic Substrates
- CTE Match with Silicon: Glass has a coefficient of thermal expansion (CTE) of approximately 3–5 ppm/°C, closely matching silicon (~2.6 ppm/°C). Organic substrates typically exhibit CTE values of 12–17 ppm/°C. This mismatch is the primary driver of warpage in large-area packages.
- Atomic-Level Flatness: Glass surfaces achieve sub-micron planarity, enabling direct lithographic patterning with sub-2-micron line/space resolution — impossible on rough organic surfaces.
- Dimensional Stability: Glass does not shrink, swell, or absorb moisture, eliminating a major source of process variability in organic substrate manufacturing.
- Superior Dielectric Properties: Glass substrates reduce signal loss by up to 50% compared to organic cores, a critical advantage for high-bandwidth interconnects between compute tiles and HBM (High Bandwidth Memory) stacks.
Through-Glass Vias (TGVs): The Interconnect Density Multiplier
TGVs are created using high-precision laser-etched processes, achieving aspect ratios as high as 20:1. The spacing between glass core vias can be less than 100 microns, directly increasing interconnect density between chiplets by up to 10× compared to organic substrate through-holes. This density gain is what enables true system-in-package (SiP) architectures housing multiple logic dies, memory stacks, and I/O tiles on a single substrate.
Intel’s Glass Substrate Strategy: From R&D to Production
Intel has invested over a decade in glass substrate research and development. In January 2026, at CES, Intel officially announced the transition of its glass substrate technology into high-volume manufacturing, marking the most significant change in chip packaging materials in over two decades.
NEPCON Japan 2026: The Thick-Core Glass Demonstration
At NEPCON Japan in January 2026, Intel Foundry showcased a “Thick Core” glass substrate integrated with its proprietary EMIB (Embedded Multi-die Interconnect Bridge) advanced packaging technology. The demonstration revealed several critical specifications:
- Package Size: 78 × 77 mm total package area
- Silicon Accommodation: Approximately 2× reticle size, equating to ~1,716 mm² of silicon area for logic and memory
- Substrate Architecture: 10-2-10 configuration — 10 RDL build-up layers on top, 2 glass core layers, and 10 RDL layers on the bottom
- Target Application: AI data center processors
The integration of EMIB with glass substrates is strategically significant. EMIB enables high-bandwidth die-to-die communication through silicon bridges embedded within the substrate. When combined with glass’s superior flatness and CTE matching, the resulting package achieves both the interconnect density and mechanical reliability required for next-generation AI accelerators.
Clearwater Forest: The First Commercial Glass Core Product
Intel’s Xeon 6+ “Clearwater Forest” processor is reported to be the first commercial product utilizing a glass core substrate. This server-class processor leverages the glass substrate to integrate multiple compute chiplets alongside HBM4 memory into a unified system-on-package (SoP), targeting hyperscale AI data center workloads.
Samsung’s Glass Substrate Ambitions: Building the Supply Chain
Samsung is pursuing glass substrate technology through two parallel paths: Samsung Electro-Mechanics (SEMCO) for substrate manufacturing, and Samsung Foundry for integration into advanced packaging solutions.
The Sumitomo Chemical Joint Venture
In a strategic move, Samsung Electro-Mechanics signed an MOU with Sumitomo Chemical Group and Dongwoo Fine-Chem to establish a joint venture dedicated to glass core manufacturing. The partnership leverages:
- Samsung Electro-Mechanics: Substrate design and integration expertise
- Sumitomo Chemical: Advanced glass material formulation and processing
- Dongwoo Fine-Chem: Chemical supply chain and specialty materials
This joint venture aims to establish manufacturing and supply capabilities for glass core materials, with a focus on enabling high-density, large-area package substrates for AI and HPC applications.
Samsung’s Timeline: Business Unit Transition and 2027 Ramp-Up
According to TrendForce reporting, Samsung has shifted its glass substrate project from a research initiative to a dedicated business unit, signaling serious commercialization intent. The company is targeting a production ramp-up by 2027, positioning it roughly one year behind Intel’s HVM timeline.
Samsung Foundry has also announced plans to introduce glass interposers in chip packaging by 2028, replacing silicon interposers in its 2.5D packaging solutions. Glass interposers offer cost advantages over silicon while maintaining the interconnect density required for multi-chiplet integration.
Glass Core vs. Organic Core: A Technical Comparison
Understanding why the industry is transitioning requires a direct comparison of the two substrate technologies:
| Parameter | Organic Core Substrate | Glass Core Substrate |
|---|---|---|
| CTE (ppm/°C) | 12–17 | 3–5 (tunable) |
| Warpage at Large Area | Severe (>100 µm at 80×80 mm) | Minimal (<20 µm) |
| Surface Flatness | ~5–10 µm variation | Sub-micron planarity |
| Min. Line/Space | ~5–8 µm | <2 µm |
| Via Density | Standard (mechanical/laser drill) | 10× higher (TGV, <100 µm pitch) |
| Signal Loss | Higher (lossy dielectric) | Up to 50% lower |
| Moisture Absorption | Yes (dimensional instability) | None |
| Max Practical Package Size | ~70×70 mm (warpage-limited) | >100×100 mm |
The warpage problem is particularly acute for AI processors. As chiplet counts increase and package sizes grow beyond 70×70 mm, organic substrates deform during thermal cycling, cracking microbumps and degrading solder joint reliability. Glass eliminates this “warpage wall” by matching silicon’s thermal behavior.
The Broader Competitive Landscape: Who Else Is in the Race?
SKC (Absolix)
SK Group’s subsidiary SKC, through its Absolix unit, is targeting mass production of glass substrates in 2026. The company is diversifying its supply chain — reducing dependence on Japan’s TOK for photoresist, and exploring additional partners for TGV and plating processes with a dual-sourcing strategy.
Samtec
Samtec has developed proprietary Glass Core Technology for ultra-miniaturized substrates targeting RF modules, MEMS sensors, automotive camera modules, and CMOS image sensors. Their approach focuses on specialized, high-value applications rather than high-volume compute packaging.
Academic and Research Contributions
The IEEE ECTC 2025 featured peer-reviewed research comparing glass-core and organic-core substrates for flip-chip packaging, examining both microbump and Cu-Cu hybrid bonding approaches. The University of Texas at Austin has active research funded by the Semiconductor Research Corporation (SRC) on characterizing warpage in advanced packages with organic substrates — work that indirectly validates the glass transition thesis.
What Does This Mean for the Connectors and PCB Industry?
The glass substrate transition has cascading implications for the broader interconnect ecosystem:
Supply Chain Realignment
Glass core manufacturing requires entirely different equipment, materials, and process expertise compared to organic substrates. Companies like Absolics (SKC), AGC, Corning, and Schott are positioning as glass panel suppliers, while traditional ABF substrate makers face potential disruption.
Design Rule Changes
With sub-2-micron line/space capability and 10× via density, glass substrates enable package designers to rethink signal routing, power delivery networks, and chiplet placement strategies. This shifts design complexity from the silicon wafer to the substrate level.
Hybrid Integration Opportunities
Glass substrates are compatible with Cu-Cu hybrid bonding — a key enabler for 3D chip stacking. The combination of glass core substrates with hybrid bonding could eventually eliminate the need for silicon interposers entirely, reducing cost while maintaining or exceeding interconnect performance.
Challenges and Risks Ahead
Despite the momentum, glass substrate adoption faces real hurdles:
- Fragility: Glass is inherently brittle. Handling, transport, and assembly processes must be re-engineered to prevent cracking and chipping during manufacturing.
- Yield Learning: High-volume manufacturing of TGVs with consistent quality is still in early stages. Defect rates must decrease significantly to achieve cost parity with mature organic processes.
- Ecosystem Readiness: EDA tools, design kits, and testing methodologies must adapt to glass-specific design rules and material properties.
- Cost: Initial glass substrate costs are higher than organic alternatives. Volume scaling and process maturation are required to close the gap.
Looking Ahead: The 2026–2030 Trajectory
The next five years will determine whether glass substrates become the dominant packaging platform or remain a premium solution for the highest-performance applications. Intel’s early HVM commitment gives it a first-mover advantage, but Samsung’s aggressive supply chain buildout and 2027 ramp-up could quickly close the gap.
The convergence of glass substrates, hybrid bonding, and chiplet architectures points toward a future where the package substrate — not the silicon wafer — becomes the primary integration platform. For the connectors and PCB industry, this transition represents both disruption and opportunity on a scale not seen since the shift from ceramic to organic substrates decades ago.
Frequently Asked Questions
What is a glass core substrate?
A glass core substrate is a semiconductor package substrate that uses a precision glass panel as its structural core, replacing traditional organic resin (ABF) materials. It offers superior flatness, thermal stability, and interconnect density for advanced chip packaging.
Why are glass substrates better than organic substrates for large chips?
Glass has a coefficient of thermal expansion (CTE) closely matching silicon, which minimizes warpage during thermal cycling. This enables package sizes exceeding 100×100 mm — critical for multi-chiplet AI processors.
When will glass substrates enter mass production?
Intel transitioned glass substrate technology into high-volume manufacturing in early 2026. Samsung is targeting a 2027 production ramp-up, and SKC’s Absolix unit is also planning mass production in 2026.
How do through-glass vias (TGVs) improve interconnect density?
TGVs are laser-etched vias with aspect ratios up to 20:1 and pitch below 100 microns, enabling up to 10× higher interconnect density compared to mechanically drilled vias in organic substrates.
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