AI-Designed Redwood: Faster Custom Silicon for Physical AI

Architect Labs introduced Redwood, an AI accelerator built and verified mostly by AI in under two weeks. It is still a prototype. If it is independently validated and turned into real silicon, it could change how chips are made.

How Redwood Was Developed

Two human architects wrote the design spec. Then the company’s AI generated most of the stack. That includes RTL, verification, firmware, drivers, and custom kernels. Today, Redwood runs on an AMD Versal FPGA, not a manufactured chip.

Core Use Case: Physical-AI Edge Devices

Redwood targets low-power, fast inference at the edge. The focus is “physical AI,” like robots and drones. The prototype has run real-time inference on open-weight models such as Qwen. It is also meant to support multi‑billion‑parameter LLMs like Llama.

Full-Stack Co-Design

Redwood combines matrix and vector engines with a dedicated on-chip network. Key workloads (attention, KV cache, and dynamic quantization) run on the chip. The design reduces reliance on a host CPU. Hardware, firmware, and kernels were developed together to match the target models.

Speed and Iteration

Traditional chip work moves from team to team. Late changes are expensive and slow. Architect Labs says Redwood can be regenerated from a revised spec in under 48 hours. Some steps still depend on standard EDA runtimes.

Projected Performance (Not Yet Independently Verified)

If built on Samsung 8 nm, the company claims Redwood would beat Nvidia Jetson Orin Nano by ~1.75× throughput while using ~1.9× less power. That implies ~3.4× better performance per watt on tested models.

These numbers come from FPGA-based projections. They are not measurements from a fabricated chip. No third-party validation has been reported.

Verification Claims

The company reports >95% code and functional coverage across blocks. It used commercial tools, its own formal methods, and hardware-in-the-loop tests. It also claims the first simulation-to-FPGA bring-up found zero hardware bugs. Independent review would be needed to confirm this.

Why It Matters

Custom chip development is slow and costly. It usually requires large expert teams. If AI-driven design works at scale, more organizations could build workload-specific silicon.

Broader Access to Custom Silicon

Smaller companies and labs could design chips for their own models and products. They would not need a large in-house semiconductor team. They could avoid relying only on older general-purpose processors.

Tighter Hardware–Software Feedback Loops

Models could help design the hardware they will run on. Better hardware could then enable faster model and kernel iteration. Architect Labs says a model running on Redwood has already suggested timing and kernel improvements.

Bottom Line

The key story is the workflow, not a single benchmark. Redwood suggests chip development could become more iterative and faster—more like software. It does not yet prove end-to-end AI-built, mass-produced silicon. But it is a concrete test of how much AI could compress chip design cycles.