
In today’s fast-paced world of electronics design, large companies are constantly juggling numerous projects at once. They work with various types of intellectual property (IP) – the essential building blocks of chips and systems. This includes software, hardware design code (like RTL or HLS), test components, physical layouts, and configuration files for timing and power. Each piece evolves, splits into different versions for various products, and must be carefully tracked for quality and performance. This tracking is known as IP lifecycle management (IPLM), a field where companies like Perforce have long been leaders. But a new challenge has emerged: Artificial Intelligence.
The AI Data Explosion: A New Challenge for Traceability
AI, particularly “agentic” systems that autonomously explore design options, is revolutionizing chip creation. These systems generate more possibilities and data than ever before. Different teams also develop their own customized AI workflows. The result? An explosive proliferation of data and design variants. For a global team trying to find the best, most reliable version of an IP block for a new product, this creates a tangled web of choices. How can engineers efficiently find the right needle in this massive, ever-growing haystack?
Why Existing Systems Fall Short in Heterogeneous Ecosystems
From a single team’s view, their chosen data management tool might seem adequate. However, modern design environments are incredibly diverse. Requirements are stored in different systems (like Doors, Jama, or Excel). Code and design data live in various version control platforms (Git, Subversion, etc.). Design tools themselves come from multiple vendors like Cadence, Siemens, and Synopsys, each with their own formats and AI databases optimized for their own tools, not for a mixed-vendor landscape.
The Search for a Unified Solution
This diversity raises a critical question: how do you search across all this data for key information—performance metrics, status, history, ownership—when every component has multiple evolving versions used by teams worldwide? Creating massive central copies of all design data (\”data lakes\”) is impractical. A smarter solution is a system that tracks summary information (metadata) with links to the original source data for deeper investigation. This system should allow natural language searches, helping users not just find a suitable IP but also understand its development history and any known issues.
A universal system from a single design tool vendor is unlikely to succeed across this fragmented ecosystem. A better approach is an independent platform that can connect to and receive updates from all the different tools in the design flow. While an open-source standard may emerge, the urgent problem of AI data growth demands a solution now. Perforce has introduced a practical and effective answer that is already being used.
Perforce P4: The AI-Enabled Backbone for Modern IPLM
The latest evolution of Perforce’s version control system, now called Perforce P4, is specifically engineered and AI-enabled to handle this complex task within large, heterogeneous, and AI-driven design enterprises. As their messaging states: “Git was built for a single maintainer. Perforce P4 was built for the shape of work agentic development takes: many contributors working in parallel across a mix of code and large binary assets.”
Tools can update an IP’s status directly through an API. Vishal Moondhra, VP of Solutions at Perforce, notes that customers and partners like Siemens have already built their own connections to the platform, and Perforce is collaborating with other vendors to expand this support.
\n\n
Empowering AI Agents Themselves
\n
This capability isn’t just for human engineers. Perforce has launched P4 MCP, which allows AI agents themselves to securely access version history, data, and code reviews. This means companies can build IP lifecycle management intelligence directly into their automated, agentic workflows, creating a seamless loop between AI exploration and robust version control.
\n\n
This represents a significant step forward. Perforce will be demonstrating these capabilities at the DAC 2026 conference in Long Beach, offering a glimpse into the future of organized, traceable, and efficient chip design in the age of AI.
发表回复
要发表评论,您必须先登录。