AMD Acquires Taalas to Expand AI Accelerator Portfolio

Deal Overview: Taalas Team Joins AMD’s AI Division

AMD has acquired AI-inference chip startup Taalas. The company was co-founded by former Tenstorrent CEO Ljubisa Bajic, who previously held executive roles at AMD. Bajic and the full Taalas team will join AMD’s AI organization led by Vamsi Boppana. Financial terms were not disclosed.

Bajic said Taalas set out to redesign inference hardware around the specific model it runs. The Canada-based team combines deep technical expertise with a willingness to challenge standard approaches. Joining AMD should provide more scale, engineering resources, and global reach.

What Makes Taalas’s Chip Technology Unique?

Taalas was founded in 2023 in Toronto. In February, it revealed a demo chip that can exceed 16,000 tokens per second per user on Llama3.1-8B. That is several times faster than many current chips. But there is a catch: the first chip only runs Llama3.1-8B.

The design draws on early-2000s “structured ASIC” ideas. The chip hardwires the dataflow for a specific model and stores the model weights permanently. This can make inference extremely fast. It also removes most programmability, so each chip effectively supports one model.

To support a new model, Taalas designs a new chip. In practice, Bajic said this mainly means updating two masks that encode weights and dataflow. Because the approach uses SRAM, bigger models need more chips. For example, a 671B-parameter DeepSeek model could require around 30 tape-outs. Taalas says its custom tool flow can generate new model-specific masks quickly, enabling a new chip in roughly two months.

How AMD Plans to Use Taalas’s Technology

AMD says it will integrate Taalas into system-level solutions alongside its Instinct GPUs.

Nvidia pursued a similar strategy last year when it bought Groq. Like Taalas, Groq focused on very fast token generation but often needs many chips for large models. Nvidia uses Groq primarily for the decode stage, paired with Nvidia GPUs. This “disaggregated inference” setup avoids storing the full model and KV cache on the decode accelerator while still improving generation speed.

AMD is also working with Cerebras on a split approach: AMD GPUs handle prefill, and Cerebras accelerates decode. Taalas’s SRAM-based chips could serve a similar decode role. That could let AMD supply and control more of the end-to-end system.

Additional Use Cases for Taalas Chips

AMD could also use Taalas chips for end-to-end inference on smaller models. That may fit “physical AI” and edge use cases, where AMD already sells FPGA accelerators and SoCs. Edge workloads often prioritize cost and power, and they may not need frequent model updates. Those constraints can align well with a structured-ASIC-style design. Intel has used a comparable approach through eASIC (acquired in 2018) for networking and defense applications.

Taalas says a single chip can support models up to roughly 8B parameters. The exact limit depends on quantization.

The acquisition is still pending closing conditions and regulatory approvals.